-------------------------------------------------------------------------------- -- nRF52832 AP ID register 0x24770011 Type is MEM-AP AHB3 MEM-AP BASE 0xe00ff003 Valid ROM table present Component base address 0xe00ff000 Peripheral ID 0x02005c4006 Designer is 0x2c4, Nordic VLSI ASA Part is 0x6, Unrecognized Component class is 0x1, ROM table MEMTYPE system memory present on bus ROMTABLE[0x0] = 0xfff0f003 Component base address 0xe000e000 Peripheral ID 0x04000bb00c Designer is 0x4bb, ARM Ltd. Part is 0xc, Cortex-M4 SCS (System Control Space) Component class is 0xe, Generic IP component ROMTABLE[0x4] = 0xfff02003 Component base address 0xe0001000 Peripheral ID 0x04003bb002 Designer is 0x4bb, ARM Ltd. Part is 0x2, Cortex-M3 DWT (Data Watchpoint and Trace) Component class is 0xe, Generic IP component ROMTABLE[0x8] = 0xfff03003 Component base address 0xe0002000 Peripheral ID 0x04002bb003 Designer is 0x4bb, ARM Ltd. Part is 0x3, Cortex-M3 FPB (Flash Patch and Breakpoint) Component class is 0xe, Generic IP component ROMTABLE[0xc] = 0xfff01003 Component base address 0xe0000000 Peripheral ID 0x04003bb001 Designer is 0x4bb, ARM Ltd. Part is 0x1, Cortex-M3 ITM (Instrumentation Trace Module) Component class is 0xe, Generic IP component ROMTABLE[0x10] = 0xfff41003 Component base address 0xe0040000 Peripheral ID 0x04000bb9a1 Designer is 0x4bb, ARM Ltd. Part is 0x9a1, Cortex-M4 TPIU (Trace Port Interface Unit) Component class is 0x9, CoreSight component Type is 0x11, Trace Sink, Port ROMTABLE[0x14] = 0xfff42003 Component base address 0xe0041000 Peripheral ID 0x04000bb925 Designer is 0x4bb, ARM Ltd. Part is 0x925, Cortex-M4 ETM (Embedded Trace) Component class is 0x9, CoreSight component Type is 0x13, Trace Source, Processor ROMTABLE[0x18] = 0x0 End of ROM table -------------------------------------------------------------------------------- -- nRF52840 AP ID register 0x24770011 Type is MEM-AP AHB3 MEM-AP BASE 0xe00ff003 Valid ROM table present Component base address 0xe00ff000 Peripheral ID 0x02002c4008 Designer is 0x2c4, Nordic VLSI ASA Part is 0x8, Unrecognized Component class is 0x1, ROM table MEMTYPE system memory present on bus ROMTABLE[0x0] = 0xfff0f003 Component base address 0xe000e000 Peripheral ID 0x04000bb00c Designer is 0x4bb, ARM Ltd. Part is 0xc, Cortex-M4 SCS (System Control Space) Component class is 0xe, Generic IP component ROMTABLE[0x4] = 0xfff02003 Component base address 0xe0001000 Peripheral ID 0x04003bb002 Designer is 0x4bb, ARM Ltd. Part is 0x2, Cortex-M3 DWT (Data Watchpoint and Trace) Component class is 0xe, Generic IP component ROMTABLE[0x8] = 0xfff03003 Component base address 0xe0002000 Peripheral ID 0x04002bb003 Designer is 0x4bb, ARM Ltd. Part is 0x3, Cortex-M3 FPB (Flash Patch and Breakpoint) Component class is 0xe, Generic IP component ROMTABLE[0xc] = 0xfff01003 Component base address 0xe0000000 Peripheral ID 0x04003bb001 Designer is 0x4bb, ARM Ltd. Part is 0x1, Cortex-M3 ITM (Instrumentation Trace Module) Component class is 0xe, Generic IP component ROMTABLE[0x10] = 0xfff41003 Component base address 0xe0040000 Peripheral ID 0x04000bb9a1 Designer is 0x4bb, ARM Ltd. Part is 0x9a1, Cortex-M4 TPIU (Trace Port Interface Unit) Component class is 0x9, CoreSight component Type is 0x11, Trace Sink, Port ROMTABLE[0x14] = 0xfff42003 Component base address 0xe0041000 Peripheral ID 0x04000bb925 Designer is 0x4bb, ARM Ltd. Part is 0x925, Cortex-M4 ETM (Embedded Trace) Component class is 0x9, CoreSight component Type is 0x13, Trace Source, Processor ROMTABLE[0x18] = 0x0 End of ROM table -------------------------------------------------------------------------------- -- nRF51822 AP ID register 0x04770021 Type is MEM-AP AHB3 MEM-AP BASE 0xf0000003 Valid ROM table present Component base address 0xf0000000 Peripheral ID 0x02007c4001 Designer is 0x2c4, Nordic VLSI ASA Part is 0x1, Unrecognized Component class is 0x1, ROM table MEMTYPE system memory present on bus ROMTABLE[0x0] = 0xf00ff003 Component base address 0xe00ff000 Peripheral ID 0x04000bb471 Designer is 0x4bb, ARM Ltd. Part is 0x471, Cortex-M0 ROM (ROM Table) Component class is 0x1, ROM table MEMTYPE system memory present on bus [L01] ROMTABLE[0x0] = 0xfff0f003 Component base address 0xe000e000 Peripheral ID 0x04000bb008 Designer is 0x4bb, ARM Ltd. Part is 0x8, Cortex-M0 SCS (System Control Space) Component class is 0xe, Generic IP component [L01] ROMTABLE[0x4] = 0xfff02003 Component base address 0xe0001000 Peripheral ID 0x04000bb00a Designer is 0x4bb, ARM Ltd. Part is 0xa, Cortex-M0 DWT (Data Watchpoint and Trace) Component class is 0xe, Generic IP component [L01] ROMTABLE[0x8] = 0xfff03003 Component base address 0xe0002000 Peripheral ID 0x04000bb00b Designer is 0x4bb, ARM Ltd. Part is 0xb, Cortex-M0 BPU (Breakpoint Unit) Component class is 0xe, Generic IP component [L01] ROMTABLE[0xc] = 0x0 [L01] End of ROM table ROMTABLE[0x4] = 0x2003 Component base address 0xf0002000 Peripheral ID 0x04000bb9a3 Designer is 0x4bb, ARM Ltd. Part is 0x9a3, Unrecognized Component class is 0x9, CoreSight component Type is 0x13, Trace Source, Processor ROMTABLE[0x8] = 0x0 End of ROM table -------------------------------------------------------------------------------- -- swm050 > dap info AP ID register 0x04770021 Type is MEM-AP AHB3 MEM-AP BASE 0xe00ff003 Valid ROM table present Component base address 0xe00ff000 Peripheral ID 0x04000bb471 Designer is 0x4bb, ARM Ltd. Part is 0x471, Cortex-M0 ROM (ROM Table) Component class is 0x1, ROM table MEMTYPE system memory present on bus ROMTABLE[0x0] = 0xfff0f003 Component base address 0xe000e000 Peripheral ID 0x04000bb008 Designer is 0x4bb, ARM Ltd. Part is 0x8, Cortex-M0 SCS (System Control Space) Component class is 0xe, Generic IP component ROMTABLE[0x4] = 0xfff02003 Component base address 0xe0001000 Peripheral ID 0x04000bb00a Designer is 0x4bb, ARM Ltd. Part is 0xa, Cortex-M0 DWT (Data Watchpoint and Trace) Component class is 0xe, Generic IP component ROMTABLE[0x8] = 0xfff03003 Component base address 0xe0002000 Peripheral ID 0x04000bb00b Designer is 0x4bb, ARM Ltd. Part is 0xb, Cortex-M0 BPU (Breakpoint Unit) Component class is 0xe, Generic IP component ROMTABLE[0xc] = 0x0 End of ROM table -------------------------------------------------------------------------------- --nuvoton m0516 AP ID register 0x04770021 Type is MEM-AP AHB3 MEM-AP BASE 0xe00ff003 Valid ROM table present Component base address 0xe00ff000 Peripheral ID 0x04000bb471 Designer is 0x4bb, ARM Ltd. Part is 0x471, Cortex-M0 ROM (ROM Table) Component class is 0x1, ROM table MEMTYPE system memory present on bus ROMTABLE[0x0] = 0xfff0f003 Component base address 0xe000e000 Peripheral ID 0x04000bb008 Designer is 0x4bb, ARM Ltd. Part is 0x8, Cortex-M0 SCS (System Control Space) Component class is 0xe, Generic IP component ROMTABLE[0x4] = 0xfff02003 Component base address 0xe0001000 Peripheral ID 0x04000bb00a Designer is 0x4bb, ARM Ltd. Part is 0xa, Cortex-M0 DWT (Data Watchpoint and Trace) Component class is 0xe, Generic IP component ROMTABLE[0x8] = 0xfff03003 Component base address 0xe0002000 Peripheral ID 0x04000bb00b Designer is 0x4bb, ARM Ltd. Part is 0xb, Cortex-M0 BPU (Breakpoint Unit) Component class is 0xe, Generic IP component ROMTABLE[0xc] = 0x0 End of ROM table -------------------------------------------------------------------------------- -- stm32l052 AP ID register 0x04770031 Type is MEM-AP AHB3 MEM-AP BASE 0xf0000003 Valid ROM table present Component base address 0xf0000000 Peripheral ID 0x00000a0417 Designer is 0x0a0, STMicroelectronics Part is 0x417, Unrecognized Component class is 0x1, ROM table MEMTYPE system memory present on bus ROMTABLE[0x0] = 0xf00ff003 Component base address 0xe00ff000 Peripheral ID 0x04000bb4c0 Designer is 0x4bb, ARM Ltd. Part is 0x4c0, Cortex-M0+ ROM (ROM Table) Component class is 0x1, ROM table MEMTYPE system memory present on bus [L01] ROMTABLE[0x0] = 0xfff0f003 Component base address 0xe000e000 Peripheral ID 0x04000bb008 Designer is 0x4bb, ARM Ltd. Part is 0x8, Cortex-M0 SCS (System Control Space) Component class is 0xe, Generic IP component [L01] ROMTABLE[0x4] = 0xfff02003 Component base address 0xe0001000 Peripheral ID 0x04000bb00a Designer is 0x4bb, ARM Ltd. Part is 0xa, Cortex-M0 DWT (Data Watchpoint and Trace) Component class is 0xe, Generic IP component [L01] ROMTABLE[0x8] = 0xfff03003 Component base address 0xe0002000 Peripheral ID 0x04000bb00b Designer is 0x4bb, ARM Ltd. Part is 0xb, Cortex-M0 BPU (Breakpoint Unit) Component class is 0xe, Generic IP component [L01] ROMTABLE[0xc] = 0x0 [L01] End of ROM table ROMTABLE[0x4] = 0x200002 Component not present ROMTABLE[0x8] = 0x0 End of ROM table -------------------------------------------------------------------------------- -- stm32f072 AP ID register 0x04770021 Type is MEM-AP AHB3 MEM-AP BASE 0xe00ff003 Valid ROM table present Component base address 0xe00ff000 Peripheral ID 0x00000a0440 Designer is 0x0a0, STMicroelectronics Part is 0x440, Unrecognized Component class is 0x1, ROM table MEMTYPE system memory present on bus ROMTABLE[0x0] = 0xfff0f003 Component base address 0xe000e000 Peripheral ID 0x04000bb008 Designer is 0x4bb, ARM Ltd. Part is 0x8, Cortex-M0 SCS (System Control Space) Component class is 0xe, Generic IP component ROMTABLE[0x4] = 0xfff02003 Component base address 0xe0001000 Peripheral ID 0x04000bb00a Designer is 0x4bb, ARM Ltd. Part is 0xa, Cortex-M0 DWT (Data Watchpoint and Trace) Component class is 0xe, Generic IP component ROMTABLE[0x8] = 0xfff03003 Component base address 0xe0002000 Peripheral ID 0x04000bb00b Designer is 0x4bb, ARM Ltd. Part is 0xb, Cortex-M0 BPU (Breakpoint Unit) Component class is 0xe, Generic IP component ROMTABLE[0xc] = 0x0 End of ROM table -------------------------------------------------------------------------------- -- ti cc1310 AP ID register 0x24770011 Type is MEM-AP AHB3 MEM-AP BASE 0xe00ff003 Valid ROM table present Component base address 0xe00ff000 Peripheral ID 0x04000bb4c3 Designer is 0x4bb, ARM Ltd. Part is 0x4c3, Cortex-M3 ROM (ROM Table) Component class is 0x1, ROM table MEMTYPE system memory present on bus ROMTABLE[0x0] = 0xfff0f003 Component base address 0xe000e000 Peripheral ID 0x04000bb000 Designer is 0x4bb, ARM Ltd. Part is 0x0, Cortex-M3 SCS (System Control Space) Component class is 0xe, Generic IP component ROMTABLE[0x4] = 0xfff02003 Component base address 0xe0001000 Peripheral ID 0x04003bb002 Designer is 0x4bb, ARM Ltd. Part is 0x2, Cortex-M3 DWT (Data Watchpoint and Trace) Component class is 0xe, Generic IP component ROMTABLE[0x8] = 0xfff03003 Component base address 0xe0002000 Peripheral ID 0x04002bb003 Designer is 0x4bb, ARM Ltd. Part is 0x3, Cortex-M3 FPB (Flash Patch and Breakpoint) Component class is 0xe, Generic IP component ROMTABLE[0xc] = 0xfff01003 Component base address 0xe0000000 Peripheral ID 0x04003bb001 Designer is 0x4bb, ARM Ltd. Part is 0x1, Cortex-M3 ITM (Instrumentation Trace Module) Component class is 0xe, Generic IP component ROMTABLE[0x10] = 0xfff41003 Component base address 0xe0040000 Peripheral ID 0x04003bb923 Designer is 0x4bb, ARM Ltd. Part is 0x923, Cortex-M3 TPIU (Trace Port Interface Unit) Component class is 0x9, CoreSight component Type is 0x11, Trace Sink, Port ROMTABLE[0x14] = 0xfff42002 Component not present ROMTABLE[0x18] = 0x0 End of ROM table -------------------------------------------------------------------------------- -- ti cc2630 AP ID register 0x24770011 Type is MEM-AP AHB3 MEM-AP BASE 0xe00ff003 Valid ROM table present Component base address 0xe00ff000 Peripheral ID 0x04000bb4c3 Designer is 0x4bb, ARM Ltd. Part is 0x4c3, Cortex-M3 ROM (ROM Table) Component class is 0x1, ROM table MEMTYPE system memory present on bus ROMTABLE[0x0] = 0xfff0f003 Component base address 0xe000e000 Peripheral ID 0x04000bb000 Designer is 0x4bb, ARM Ltd. Part is 0x0, Cortex-M3 SCS (System Control Space) Component class is 0xe, Generic IP component ROMTABLE[0x4] = 0xfff02003 Component base address 0xe0001000 Peripheral ID 0x04003bb002 Designer is 0x4bb, ARM Ltd. Part is 0x2, Cortex-M3 DWT (Data Watchpoint and Trace) Component class is 0xe, Generic IP component ROMTABLE[0x8] = 0xfff03003 Component base address 0xe0002000 Peripheral ID 0x04002bb003 Designer is 0x4bb, ARM Ltd. Part is 0x3, Cortex-M3 FPB (Flash Patch and Breakpoint) Component class is 0xe, Generic IP component ROMTABLE[0xc] = 0xfff01003 Component base address 0xe0000000 Peripheral ID 0x04003bb001 Designer is 0x4bb, ARM Ltd. Part is 0x1, Cortex-M3 ITM (Instrumentation Trace Module) Component class is 0xe, Generic IP component ROMTABLE[0x10] = 0xfff41003 Component base address 0xe0040000 Peripheral ID 0x04003bb923 Designer is 0x4bb, ARM Ltd. Part is 0x923, Cortex-M3 TPIU (Trace Port Interface Unit) Component class is 0x9, CoreSight component Type is 0x11, Trace Sink, Port ROMTABLE[0x14] = 0xfff42002 Component not present ROMTABLE[0x18] = 0x0 End of ROM table -------------------------------------------------------------------------------- -- cypress psoc4200 series AP ID register 0x04770021 Type is MEM-AP AHB3 MEM-AP BASE 0xf0000003 Valid ROM table present Component base address 0xf0000000 Peripheral ID 0x00102b4093 Designer is 0x0b4, Cypress Part is 0x93, Unrecognized Component class is 0x1, ROM table MEMTYPE system memory present on bus ROMTABLE[0x0] = 0xf00ff003 Component base address 0xe00ff000 Peripheral ID 0x04000bb471 Designer is 0x4bb, ARM Ltd. Part is 0x471, Cortex-M0 ROM (ROM Table) Component class is 0x1, ROM table MEMTYPE system memory present on bus [L01] ROMTABLE[0x0] = 0xfff0f003 Component base address 0xe000e000 Peripheral ID 0x04000bb008 Designer is 0x4bb, ARM Ltd. Part is 0x8, Cortex-M0 SCS (System Control Space) Component class is 0xe, Generic IP component [L01] ROMTABLE[0x4] = 0xfff02003 Component base address 0xe0001000 Peripheral ID 0x04000bb00a Designer is 0x4bb, ARM Ltd. Part is 0xa, Cortex-M0 DWT (Data Watchpoint and Trace) Component class is 0xe, Generic IP component [L01] ROMTABLE[0x8] = 0xfff03003 Component base address 0xe0002000 Peripheral ID 0x04000bb00b Designer is 0x4bb, ARM Ltd. Part is 0xb, Cortex-M0 BPU (Breakpoint Unit) Component class is 0xe, Generic IP component [L01] ROMTABLE[0xc] = 0x0 [L01] End of ROM table ROMTABLE[0x4] = 0x0 End of ROM table -------------------------------------------------------------------------------- -- cypress PSoC4200M series AP ID register 0x04770021 Type is MEM-AP AHB3 MEM-AP BASE 0xf0000003 Valid ROM table present Component base address 0xf0000000 Peripheral ID 0x00301b40a1 Designer is 0x0b4, Cypress Part is 0xa1, Unrecognized Component class is 0x1, ROM table MEMTYPE system memory present on bus ROMTABLE[0x0] = 0xf00ff003 Component base address 0xe00ff000 Peripheral ID 0x04000bb471 Designer is 0x4bb, ARM Ltd. Part is 0x471, Cortex-M0 ROM (ROM Table) Component class is 0x1, ROM table MEMTYPE system memory present on bus [L01] ROMTABLE[0x0] = 0xfff0f003 Component base address 0xe000e000 Peripheral ID 0x04000bb008 Designer is 0x4bb, ARM Ltd. Part is 0x8, Cortex-M0 SCS (System Control Space) Component class is 0xe, Generic IP component [L01] ROMTABLE[0x4] = 0xfff02003 Component base address 0xe0001000 Peripheral ID 0x04000bb00a Designer is 0x4bb, ARM Ltd. Part is 0xa, Cortex-M0 DWT (Data Watchpoint and Trace) Component class is 0xe, Generic IP component [L01] ROMTABLE[0x8] = 0xfff03003 Component base address 0xe0002000 Peripheral ID 0x04000bb00b Designer is 0x4bb, ARM Ltd. Part is 0xb, Cortex-M0 BPU (Breakpoint Unit) Component class is 0xe, Generic IP component [L01] ROMTABLE[0xc] = 0x0 [L01] End of ROM table ROMTABLE[0x4] = 0x0 End of ROM table